4GB – 32bit northbridge BAR1 error

With the Laptop that I have, it appears to have a 32 bit northbridge with a 64 bit cpu’s, I have logged this error with the PCI kernel group because hopefully they will be able to give some advice and also I am giving data back to the Linux group on the whole.

Shall put any advice on the kernel PCI group list back on this page regarding the error, if anyone wants to look over the 2GB/4GB dmesg + /proc/iomem files just say.

“I have a acer aspire 9815 with from what I have read a 32bit Northbridge and when you add 4GB of RAM with a nVidia 256 of “virtual
ram” causes a base address registers (BAR1), but works fine with 2GB because there is a problem with the way that Linux kernel is
allocating the memory associated with the devices and places then out of range.

Here is my lspci for the PCI host bridge

Host bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and
945GT Express Memory Controller Hub (rev 03)
PCI bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and
945GT Express PCI Express Root Port (rev 03)

From this website it appears that some one was trying to update the PCI IOMEM part of the kernl

http://tjworld.net/wiki/Linux/PCIDynamicResourceAllocationManagement

but says that it will be in the .30 / .31 kernel but I am not able to still use the 4GB of ram and I am using the 2.6.31-10-generic
#35-Ubuntu SMP Tue Sep 22 17:33:42 UTC 2009 i686 GNU/Linux from a kubuntu 9.10 setup and was hoping to have the fix already applied.

Was wondering since I am using the k/ubuntu kernel does the “real” kernel have the PCI IOMEM Upgrade ? or do I have pass some kernel
parameters on grub to allow for this to work correctly ? or has there been another upgrade to the PCI structure that will come in a later
release ?

Also there was some advice to update the BIOS for some laptops and set the upper memory limit, does this make the PC memory have a virtual
head to it and thus the OS will not see the rest of RAM ? or is it just for the PCI setup aspects that look at the upper memory limit and
the rest of the OS can see the and use the rest of the RAM ?

Any advice would be great.”

UPDATE

The only advice was that how about trying out the 64bit kernel, which is what I am using.

2 thoughts on “4GB – 32bit northbridge BAR1 error”

  1. From Borun on the kernel mailing list.


    Here’s the situation with 2GB of RAM:

    00100000-7fe8ffff : System RAM
    80000000-febfffff : PCI Bus 0000:00 (“pci=use_crs” would show this)
    b0000000-bfffffff : PCI Bus 0000:01 (prefetchable mem aperture)
    b0000000-bfffffff : 0000:01:00.0 nVidia 256MB BAR 1
    d0000000-d1ffffff : PCI Bus 0000:01 (non-prefetchable mem aperture)
    d0000000-d0ffffff : 0000:01:00.0 nVidia 16MB BAR 0
    d1000000-d1ffffff : 0000:01:00.0 nVidia 16MB BAR 3

    But with 4GB of RAM, we have much less PCI MMIO space:

    00100000-bfe8ffff : System RAM
    c0000000-febfffff : PCI Bus 0000:00
    d0000000-d1ffffff : PCI Bus 0000:01 (non-prefetchable mem aperture)
    d0000000-d0ffffff : 0000:01:00.0 nVidia 16MB BAR 0
    d1000000-d1ffffff : 0000:01:00.0 nVidia 16MB BAR 3

    BIOS still put the bridge prefetchable mem aperture and the nVidia frame buffer at 0xb0000000-0xbfffffff, but I think this is a BIOS bug because this overlaps the System RAM region.

    Linux noticed this overlap and disabled the prefetchable mem aperture. Then the nVidia frame buffer alloc failed because the aperture was closed:

    pci 0000:00:01.0: bridge 64bit mmio pref: [0xb0000000-0xbfffffff]
    pci 0000:01:00.0: reg 14 64bit mmio: [0xb0000000-0xbfffffff]
    pci 0000:00:01.0: BAR 15: address space collision on of bridge
    [0xb0000000-0xbfffffff]
    pci 0000:00:01.0: BAR 15: can’t allocate resource
    pci 0000:01:00.0: BAR 1: no parent found for of device
    [0xb0000000-0xbfffffff]
    pci 0000:01:00.0: BAR 1: can’t allocate resource
    pci 0000:00:01.0: BAR 15: can’t allocate mem resource
    [0x100000000-0xffffffff]
    pci 0000:01:00.0: BAR 1: can’t allocate mem resource [0xe0000000-0xd1ffffff]

    [I have some patches to make these messages more sensible.]

    I don’t see an easy way to fix this. There *is* still enough MMIO space to make everything fit below 4GB, but that would require moving other devices around, and I don’t think we’re smart enough to do this yet.

    If the host bridge supports it, we could move that prefetchable aperture above 4GB; then everything would fit easily. But Ian suggests that the hardware doesn’t support that.

    The NVRM patch is a gross hack that just clobbers the resources of a specific device. You can always do that and make a particular machine work (something similar could be done for this 4GB config), but it could never go upstream.

    I think right now, we should just treat this as a BIOS bug that Linux isn’t smart enough to work around. The BIOS *should* have set up all the devices so it would just work, but it didn’t.”

    Which basically means that I will have to either hope that ACER do a update to the BIOS that will work, or just update my laptop to one that will.

Leave a Reply

Your email address will not be published. Required fields are marked *